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JCET Group

长电科技

Global chip assembly and test house, from wafer probing to drop-ship

Headquarters
Jiangyin, Jiangsu
Region
Jiangsu
Founded
1998
Stage
Public
01

Overview

JCET provides turnkey back-end manufacturing for semiconductor customers worldwide, covering microsystem integration, design simulation, wafer probing, chip and device packaging, final test, product qualification and global drop-ship. It runs eight manufacturing sites and two R&D centers across China, Korea and Singapore, plus more than 20 sales and support offices. Its process portfolio spans wafer-level packaging, 2.5D/3D packaging, system-in-package, flip-chip and wire-bond, serving automotive, AI, high-performance computing, high-density memory, networking, smart devices, industrial and medical, and power and energy customers.

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Products

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Wafer-level packaging (WLP)

Fan-in / fan-out wafer-level packaging for mobile and HPC dies

2.5D / 3D packaging

Heterogeneous integration for high-bandwidth memory and chiplet designs

System-in-package (SiP)

Multi-die modules for wearables, RF and automotive

Flip-chip and wire-bond

Mainstream package families plus advanced migration paths

Final test and qualification

Wafer sort, final test, reliability and product certification

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Highlights

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  • 01Revenue of RMB 30.95 billion (+8.0% YoY) and net profit of RMB 1.62 billion (+69.6% YoY) in the first three quarters of 2026, with gross margin at 16.0% and a debt-to-asset ratio of 48.4%.
  • 02Eight manufacturing sites and two R&D centers across China, Korea and Singapore, with about 24,952 employees.
  • 03Its process menu already covers 2.5D/3D and SiP, the two packaging families that AI accelerators and high-bandwidth memory depend on.
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People

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Funding

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  1. IPO

    CNY 3.779 亿
    Source
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Events

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Not yet listed

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Related projects

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Not yet listed

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Topics

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Coverage

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Information compiled from public sources; refer to the company's official website for authoritative details.